📖 Asynchronous System-on-Chip Interconnect
Thursday, September 6, 2018 by dev
Asynchronous System-on-Chip Interconnect
By:John Bainbridge
Published on 2002-01-01 by Springer Science & Business Media
This text describes the use of an entirely asynchronous system-bus for the modular construction of integrated circuits. Industry is just awakening to the benefits of asynchronous design in avoiding the problems of clock-skew and multiple clock-domains, and in parallel with this is coming to grips with intellectual property (IP) based design flows which emphasize the need for a flexible interconnect strategy. In this book, John Bainbridge investigates the design of an asynchronous on-chip interconnect, looking at all the stages of the design from the choice of wiring layout, through asynchronous signalling protocols to the higher level problems involved in supporting split transactions. The MARBLE bus (the first asynchronous SoC bus) used in a commercial demonstrator chip containing a mixture of asynchronous and synchronous macrocells is used as a concrete example throughout the book.
This Book was ranked at 28 by Google Books for keyword chip.
Book ID of Asynchronous System-on-Chip Interconnect's Books is 6cWoGRfz_k0C, Book which was written byJohn Bainbridgehave ETAG "MicLpDWGC0Y"
Book which was published by Springer Science & Business Media since 2002-01-01 have ISBNs, ISBN 13 Code is 9781852335984 and ISBN 10 Code is 185233598X
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